4 resultados para mitigation

em Universidad de Alicante


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Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their programmability and cost-effectiveness. Recent advances in electronic technologies have allowed remarkable improvements in their performance. However, they have also made microprocessors more susceptible to transient faults induced by radiation. These non-destructive events (soft errors), may cause a microprocessor to produce a wrong computation result or lose control of a system with catastrophic consequences. Therefore, soft error mitigation has become a compulsory requirement for an increasing number of applications, which operate from the space to the ground level. In this context, this paper uses the concept of selective hardening, which is aimed to design reduced-overhead and flexible mitigation techniques. Following this concept, a novel flexible version of the software-based fault recovery technique known as SWIFT-R is proposed. Our approach makes possible to select different registers subsets from the microprocessor register file to be protected on software. Thus, design space is enriched with a wide spectrum of new partially protected versions, which offer more flexibility to designers. This permits to find the best trade-offs between performance, code size, and fault coverage. Three case studies have been developed to show the applicability and flexibility of the proposal.

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In many regions, seawater desalination is a growing industry that has its impact on benthic communities. This study analyses the effect on benthic communities of a mitigation measure applied to a brine discharge, using polychaete assemblages as indicator. An eight-year study was conducted at San Pedro del Pinatar (SE Spain) establishing a grid of 12 sites at a depth range of 29–38 m during autumn. Brine discharge started in 2006 and produced a significant decrease in abundance, richness and diversity of polychaete families at the location closest to the discharge, where salinity reached 49. In 2010, a diffuser was deployed at the end of the pipeline in order to increase the mixing, to reduce the impact on benthic communities. After implementation of this mitigation measure, the salinity measured close to discharge was less than 38.5 and a significant recovery in polychaete richness and diversity was detected, to levels similar to those before the discharge. A less evident recovery in abundance was also observed, probably due to different recovery rates of polychaete families. Some families like Paraonidae and Magelonidae were more tolerant to this impact. Others like Syllidae and Capitellidae recovered quickly, although still affected by the discharge, while some families such as Sabellidae and Cirratulidae appeared to recover more slowly.

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The use of microprocessor-based systems is gaining importance in application domains where safety is a must. For this reason, there is a growing concern about the mitigation of SEU and SET effects. This paper presents a new hybrid technique aimed to protect both the data and the control-flow of embedded applications running on microprocessors. On one hand, the approach is based on software redundancy techniques for correcting errors produced in the data. On the other hand, control-flow errors can be detected by reusing the on-chip debug interface, existing in most modern microprocessors. Experimental results show an important increase in the system reliability even superior to two orders of magnitude, in terms of mitigation of both SEUs and SETs. Furthermore, the overheads incurred by our technique can be perfectly assumable in low-cost systems.

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Integrity assurance of configuration data has a significant impact on microcontroller-based systems reliability. This is especially true when running applications driven by events which behavior is tightly coupled to this kind of data. This work proposes a new hybrid technique that combines hardware and software resources for detecting and recovering soft-errors in system configuration data. Our approach is based on the utilization of a common built-in microcontroller resource (timer) that works jointly with a software-based technique, which is responsible to periodically refresh the configuration data. The experiments demonstrate that non-destructive single event effects can be effectively mitigated with reduced overheads. Results show an important increase in fault coverage for SEUs and SETs, about one order of magnitude.